tun: default pin CPUs avoid NIC IRQ cores

When tun.pin_threads is on and tun.cpu_affinity is unset, pick pin CPUs
from the allowed set that do not service any up physical NIC's MSI vectors
(read-only walk of /sys/class/net/*/device/msi_irqs and
/proc/irq/*/effective_affinity_list). The old allowed[i] default pinned
encrypt threads onto exactly the cores drivers affine their first RX queue
IRQs to; a flow whose RSS queue fired there had NAPI fighting encrypt for
the core (measured 8.4 vs 10.2 Gbps REV bimodality). Falls back to the old
spread, with a log, when there aren't enough IRQ-free CPUs - e.g. drivers
that allocate one queue per core until the admin narrows them (ethtool -L).

Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
This commit is contained in:
JackDoan
2026-07-14 15:14:40 -05:00
parent 37b924945d
commit 7fe4fab167
6 changed files with 448 additions and 3 deletions
+9
View File
@@ -0,0 +1,9 @@
//go:build !linux || android || e2e_testing
package util
// NICIRQCPUs reports no IRQ information on platforms without the linux
// sysfs interface; callers fall back to their non-IRQ-aware defaults.
func NICIRQCPUs() (map[int]bool, error) {
return nil, nil
}